Architecture Simulation Framework for 3D IC

The practical limitation of implementing 3-dimensional integrated circuits is the increased thermal stress. The integration of liquid cooling with 3D IC can solve the thermal problems, allowing up to 1,000W/cm of power density [1, 2]. Thus, the significant performance improvement can be made through 3D ICs and liquid cooling integration. However, increased transistor and power density will address failure concerns, threatening the lifetime reliability of microprocessors [5]. Therefore, 3D ICs must be designed under the constraints of microarchitecture, energy, thermal, area, and reliability. There had been many efforts to develop accurate and fast modeling of these 3D IC physical properties. We note that the simulation models of these physical phenomena must be designed to interact with each other to correctly capture the tradeoffs among 3D IC design constraints. In this paper, we present the methodology for 3D IC simulations and present a novel simulation framework for the 3D IC design space exploration.